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Great tshirt

Saving that quote.

But how are you going to fix it then?

Change your code to not trigger the bug, and leave that workaround there for the next decade or so until the buggy CPU generation isn't relevant anymore.

Or hope for microcode updates to fix the bug at the CPU level.

That's my point ... it's a lot harder to do this than to just fix it in your own code.

You change the compiler to carefully step around the stuff that doesn't work in the hardware.

Compilers can be patched to automatically do some masking in the code generation step after every LDRB instruction in this case, when compiling for that specific CPU. For example, the Blackfin DSPs have many similar bugs which are fixed this way. Some of which the fixes done automatically, while others could be disabled for performance critical code which has been implemented while keeping the various issues in mind, like -mcsync-anomaly and -mspecld-anomaly.

Certain MIPS CPUs also have incorrectly implemented instructions and the -mfix-* compiler parameters could be used to enable workarounds.

JIT compilers can do the same.