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Comment by LeoPanthera | Hacker News Reader

64 GB chips that failed testing? That's one way to increase yield.

Clive Sinclair did that trick back in the 80s.

Doesn't look like it. Memory ICs are tested before packaging, and then are packaged in stacks. While I'm sure there's some loss in packaging, probably not enough to justify this level of binning; and most of the failures that would happen at this stage would potentially interfere with signal integrity for the whole stack.

Instead, it looks like after the 8-high stacks that I knew about, manufacturers went to 12-high stacks. There are 16-high stacks available too, but looks like there's a lot more backside thinning needed to keep the same Z height so cost goes up disproportionately and 12-highs are a reasonably sweet spot for capacity per dollar.

There are non power of two sized DRAM dies in production these days; it's not purely a matter of stacking (and stacking doesn't make it any easier to have something in between one die per channel and two dies per channel). You can get 24GB single-rank and 48GB dual-rank DDR5 UDIMMs compared to a year ago when the options were 16GB and 32GB; no stacking at all, just going from 16Gbit to 24Gbit per die. But LPDDR has been doing this for longer due to demand in the smartphone market.

Intel and AMD do that now with processors.

Apple did binning back with the original M1. (either 7-core or 8-core models)

Uncle Clive.

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