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It's been like 20 years since I did anything with an FPGA, but back then you basically had to use whatever tools your vendor provided you with. Have things improved to the point where an open-source HDL is usable with a large fraction of the FPGAs available?

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Mostly you still have to use their tools, Chisel just compiles to Verilog and then you use their tools for the rest of the process.

There are open source tools based on reverse engineering the bitstream for some smaller FPGAs like the Lattice family, some preliminary work on Xilinx, and one vendor actually supporting the open source toolchain (QuickLogic), but for anything serious on the major FPGA platforms, you still need to use the vendor toolchain.

Thanks for the heads up about QuickLogic. hdn't heard of them yet.

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