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Vircon32 looks very nice!

So what did you do w.r.t. addressing modes? Do you have memory-memory operations? Is it a load/store architecture?

I found the CPU specification (https://github.com/vircon32/Vircon32Documents/blob/main/Spec...), but I couldn't find an ISA specification.

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Thank you! The CPU document should cover everything about the ISA itself. There are 8 addressing modes, which are covered in pages 19 and 20. MOV is the only instruction that explicitely uses them. Other instructions, at most, can only choose to either use registers or an immediate value.

There are no capabilities like DMA, so memory-memory operations are not really possible with the only exception of instruction MOVS which acts as a supposed MOV [DR], [SR].

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