Most famously, Gene Amdahl started https://en.wikipedia.org/wiki/Trilogy_Systems in the 80s to explore this idea.
The calculus changes when you don't have to dice the wafer, packaging, etc. I'd say that we clock things now at the highest speed that we can safely remove heat, so these wafer scale chips, we trade frequency for area and need/should clock them much slower.
At large production runs, the wafer in a Cerebras is 20k each for a system costing millions and the primary engineering feat is still cooling. I'd love to see a WSI system utilizing NTV (near threshold voltage) logic.
https://semiengineering.com/near-threshold-computing-2/
Another interesting design pattern that has arisen is that Cerebras, Esperanto, Tenstorrent, and InspireSemi are all mesh networks using message passing.
What kinds of things did you work on at Inmos?
...so apparently not... ;)
P ∝ C×V²×f
So if you are ready to accept a lower speed per core, the power draw can be controlled and you won't get a toaster.One difficulty would be that modern technological nodes have high leakage and dissipate power even when they are not switching, making it more advantageous to clock aggressively, finish the computation as fast as possible and cut the power on that entire circuit for the remainder of the timer slot ("race to idle"), as opposed to reducing the frequency and prolonging the "on" phase.
But that's a deliberate design choice, knowing the chip will be cut out and fitted with a substantial thermal solution. Wafer level power draw it's definitely something you can control at the design stage.
If we could do that then we could run terahertz frequencies.
I also recall Clive Sinclair suggesting this approach in the late 80s (can't recall if that was somehow related to the transputer or was completely separate). I believe his idea was that the faulty CPUs that naturally exist due to wafer defects would be cut off from the main group (I could have misremembered but I think it may have been via some kind of self test process).
RAM, not CPU, but IIRC he was talking about CPUs too.
and later there was a prototype storage product:: https://www.computinghistory.org.uk/det/3043/Anamartic-Wafer...
https://www.kip.uni-heidelberg.de/vision/previous-projects/f...
And now when I've red the title, the heat was the first thing that came to my mind.
These days I'm working on a PCB with many LEDs on it and heat management is much more challenging; I ended up designing the board so that the LEDs sit on thermal rectangles with through-holes (vias) that connect it to a massive ground plane (in this case it's "thermal ground" not just electric ground), as described in the datasheet for my LED chip. Each LED is 3W so it can get hot really quickly, but as long as the board is adequately coupled to a larger heat sink, it can run at fairly high power. Thermal coupling is harder than I expected! I have learned you can melt solder with a hot LED(!).
Also, it helps to run LEDs at a lower-than-max power; you get most of the light but less of the heat. Keeping LEDs in their happy zone prolongs their life signficantly.
Not sure what needs 1600 cores in one 'chip' but it's probably fairly impressive.
Pizza Computing
Easy to drill for water cooling, and at these scales pretty cheap.
Or are we talking just getting the heat out to whatever heat management device is attached without burning something in the chip itself?
Therefore, the amount of heat by heating elements(the tiny wires over the wafer) grow faster than the heat dissipation capacity, which rises the temperature until the unit breaks.
Notice that when the heating elements are close together you lose the horizontal heat gradient advantage since that grows by the perimeter when the heat generating elements grow by the area.
Which means you have to get creative, add moving parts or use more exotic materials, which makes the thing significantly more expensive and less reliable as more things to break are added.
I would also think a huge wafer like this would correlate with a data center, where cooling is less of an issue than say a laptop or desktop. or a wafer-phone :)
I'd totally eat compute toast, where can I get such a toaster?
Send the design to JLCPCB; it usually takes a few days and costs almost nothing to have that shipped to the US.
Design a base that holds two of the boards a fixed distance between each other, with room for toast, and build an enclosure. You also need a spring-loaded part to hold the toast in place and let you pop it out.
Here's an example, sans JLC: https://www.instructables.com/PCB-Heater-Diy-Joule-heating/
Much of the challenge would be making this food safe, and consumer-safe, while also affordable and competitive with a $5 toaster, but that doesn't stop a sufficiently motivated hacker.