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Comment by mikewarot | Hacker News Reader

Making systolic array chips (my BitGrid design) to bring provably secure Petaflops to the masses. They're handy for any algorithm that can tolerate extreme pipelining, including deep nets.

Because everything is trivial to reason about, there's nowhere for bugs, or zero day exploits, to hide.

Oh.. and we'd do an open source data diode product as well.

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Do you have any other examples where systolic arrays are suitable other than matrix multiplication? As far as I am aware, other problems require different systolic architectures. So I am curious whether you are talking about a general purpose architecture.

I'm talking about a Turing complete, general purpose architecture.[1] One with some seemingly stupid choices that turn out to work well. A cartesian grid of look up tables (LUTs) with latches, clocked in alternating phases. This slows things down, and makes it completely deterministic, and very easy to reason about. There are no race conditions to worry about. Like an excel spreadsheet, it's very easy to see all of the dependencies, and circular references aren't possible in the traditional sense, because of that delay.

I'm stuck in analysis paralysis... or I'd have more than an emulator[2] to show you. In theory, you can take any expression that can be broken down to a directed graph of binary logical expressions, and compile it into the "program" for the BitGrid. Because the grid is homogeneous, you can shift or rotate, or flip it to move the I/O around. The aforementioned dependency tracing makes it possible to prove the functionality conforms to the desired logical expression graph.

I need a kick in the pants to get the rest of this thing figured out. As near as I can tell, the only problems are my own writers block.

[1] https://esolangs.org/wiki/Bitgrid

[2] https://github.com/mikewarot/Bitgrid

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