50 years ago this may not have been such a problem, but now that we care a lot, lot more about the power consumption of our computing, and a lot of that power consumption is based on voltage (and IIRC often super-linearly), so a tech that requires us to introduce additional voltage levels pervasively to our chips is basically disqualified from the very start. You're not sticking one of these in your server farm, phone, or laptop anytime soon.
Wait, what?! I did not know this. Is there a link where I can learn more?
That's an older article from when TLC (3bit) NAND launched, but the principles are the same for QLC (4bit).
Nowadays SLC and MLC are barely used because TLC is good enough for nearly all purposes.
Some SSD controllers will also reassign regions of flash to different modes on the fly, the drives unused capacity can be used internally as a very fast pSLC write cache, and then as the drive fills up those cells incrementally get switched over to the native TLC/QLC mode.
This is very interesting. Thank you.
If you want to do it in a single step, you need 8 analogic comparators at the output of the memory, and one level of "and" and "or" gates to solve each bit.
Most ADCs use a single comparator + OpAmp and convert the value in 3 steps. But that would make your memory slower.
Either way, the task of converting it does not fall over the controller.
Op didn’t specify any particular voltage but you should get the example. You need more voltage between the highest and lower states to differentiate the signals compared to binary. It can work well but only in circuits where there’s already very low leakage (flash mentioned as another reply is a great example).
note: I am aware that strictly speaking a CPU isn't transistors, but it is a lot of variously doped silicon still.
I wonder if this is why they suggested a negative voltage. Even though voltages are secretly relative under the hood, it seems like it could simplify things to have two directionally different voltages.