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What use cases are you imagining where you need arbitrary data output and processing at 100GHz speeds? It's my understanding that even 100GbE is running at a fraction of those frequencies.

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To be able to spend multiple cycles for processing a bit. Or process multiple bits arriving at the same time. Also it might be necessary to measure signal multiple times. May be 100 GHz is too much... For example I wanted to bit-bang FM radio by measuring antenna signal, that's around 100 MHz, so I need to probe around 200-300M times per second and perform at least minimal processing, I guess.

I realize FM radio is strictly an example, but would you not rely on bandpass sampling? Where you sample at some multiple of your bandwidth and rely on the spectral replication effect to get your waveform.

Ref: https://en.wikipedia.org/wiki/Undersampling (funny enough, this article explicitly calls out the FM radio use case).

You need a very stable clock for that, which was also called out as a thing. With some PLLs you could lower the needed frequency. I think you're really looking for a small FPGA though.

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