You're right on a couple of things. For instance, I probably overstated the time for parsing in a way that makes it sound like it's part of the actual hardness, when really it was just something I wanted to make explicit to be precise. And the point about randomness in the LTC part is valid — the verifier itself is fully deterministic and uses a fixed check index r, but the LTC construction it relies on is based on randomness. I see now that this wasn’t clearly separated in how I wrote it.
About the certificate: I get why it might look redundant at first. The key idea is that the verifier doesn’t go looking for a parity check that fails — it just verifies the one that’s provided. So r isn’t there because the verifier couldn’t find a violation, but because it doesn’t try to; it just checks whether the one it's told about actually fails. That said, I completely agree it could be better explained.
The diagonalization part definitely needs more clarity too. You're right: just looping over inputs only works if you can guarantee that failure will eventually happen — and that’s supposed to come from the circuit-counting bound. I’ll go back and make that implication and its formal reasoning much more explicit.
As for the machines halting — that’s handled by padding every D_i so it always halts within a fixed polynomial time (as mentioned in Lemma 4.1), but again, I agree that’s not emphasized enough and should be stated more clearly.
Overall, your feedback is incredibly helpful — not just in pointing out specific issues, but also in showing me how things might come across to someone reading this fresh. I'm already working on revising the affected sections, and I’d honestly be glad to hear any further thoughts you (or others) might have. Thanks again!