A related question would be if Motorola could pull off what Intel did with x86, and drag the architecture to be competitive with RISC. Part of Intel's trick was that x86 isn't the most CISCy of chips, so it was easy to implement a processor that takes a "RISCy subset" of instructions and translate them into one or two µops. 68k is perhaps more on the VAX side of things, so whether they'd be able to pull off the same trick is a bit unclear. Clearly we need to check the parallel universes where IBM chose the 68008 for Chess instead of the 8088...
Everyone was encouraged to move on to the fast subset and the new multimedia instructions.
The core instruction set of the m68k, as far as ALU/FPU is concerned, is simple enough. But converting the addressing modes to "risc building blocks" (μops or whatever term you like to use) is harder.
Not only new code. Old code in an high-level language would benefit, too, if the language compiler was updated and the code recompiled.
Also, if you need to recompile to get a performance boost, why not recompile for a cleaner modern architecture? You can always use an emulator for legacy code, if it isn't going to run fast on a modern CPU either way...
In Apple's search for a RISC chip, didn't want to be stuck being single-sourced again so they had IBM and Motorola work together to launch PowerPC instead, so Motorola gave up on the 88k.
Perhaps this had just been a misunderstanding of a second-hand statement. Its first iteration was flawed in that it was an expensive multi-chip solution with few buyers. The second was more integrated though.
If NeXT hadn’t killed their hardware division in 93, the RISC Workstation would’ve run an MC88110.
Coldfire V4/V5 are significantly faster than 060.