As the article says, some processors only have an instruction that produces 1 bit of quotient per cycle. This gives a variable time for integer division which can be longer than the time it takes to do a floating point operation.

This sort of limitation has a long pedigree and is surprisingly common. For instance, the CDC 6000 series had no general purpose integer arithmetic unit. The DEC Alpha had no integer divide and the standard RISC-5 spec also omits it. Same for low-end ARM chips.

It’s a more important use case, so CPU vendors throw more resources at it.