The EDA tools that are used to design chips do not support diagonal wires so that kind of rules out hexagonal grids. With only horizontal and vertical wires you end up with rectangular/square grids or rings.
Wouldn't a rectangular brick layout be topologically a hexagonal tiling
I could see that square packing is more simple, but by shifting elements per row I don't see why it couldn't propagate at odd angles.
Diagonal wires worked everywhere at 180nm and on a few fabs at 90nm if you rotated a whole metal layer (i.e. all metal-3 wires are diagonal to the metal-2 wires) and basically nowhere beyond 90nm.
OPC killed it. Too hard to OPC the diagonal stuff. And even if you rotate an entire metal layer, the contacts between a rotated and un-rotated layer would require enormous metal enclosures.