Are you talking about this paper? https://gmplib.org/~tege/x86-timing.pdf

I only saw evidence of data-dependent timing with respect to the div operation, but maybe I missed something.

Of course, I am not suggesting other operations are inherently immune to data-dependent timing leaks.

EDIT: I see there are also some notes on adc and sbb in some situations, i.e. chains of instructions that all light up the carry flag.