Automated X86 to GPU native translation is looking more and more feasible, with some caveats. Especially SIMD operations are a natural fit. But the issues... GPUs are sequentially very slow. Single thread execution is over an order of magnitude slower than for CPUs. Latency between host CPU and GPU is usually significant, measured even in milliseconds. Other than memory bandwidth, CPUs are catching up on GPUs anyways. If x86 SIMD keeps getting wider, we might be just a few years away from CPU and GPU processing power parity.
But FPGAs... Does it place and route itself, or use something like OpenCL as a backend? Or does it make "netlists" out of x86 code and somehow make existing FPGA tools to compile them to chip fabric?
Anyways, when it comes to this product and FPGAs, I believe only when I see!