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ArashEdalat

0 karma · joined March 28, 2024

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ArashEdalat··on Ask HN: Who is hiring? (November 2026)
Apply here: https://tally.so/r/BzrbN7?source=hn

Consumer Physical AI (stealth, robotics) | Mechatronics Engineer, AI Engineer | California / REMOTE (US) | Full-time

Early-stage startup building a robot for the home, on real hardware with ROS 2. You'd be one of the first engineers.

Mechatronics Engineer: actuators, motor control, embedded firmware, fast prototyping on a multi-axis arm.

AI Engineer: perception and calibration on physical hardware, deploying models to on-device compute.

ArashEdalat··on Why Is Speculative Decoding Fast?
has anyone tried different approaches to this?
ArashEdalat··on Why Is Speculative Decoding Fast?
we have action chunking in robotics for the same reason so VLAs can analyze faster and come to actions, the latency and inference are both slow so many steps need to come together for this to happen correctly
ArashEdalat··on Prompt injection in HTTP headers: what 217M web responses show
I am hiring and received this pfd with hidden text, claude flagged it and I was so confused what is going on, so I printed all text in my notes app and I realized resume had hidden text white font on white background, so only AI could see and read

I was impressed the model picked it up and flagged system manipulations

ArashEdalat··on Gemini 4 Argon
Geometry could be understood today with the model but what also really matters is the sensing, friction, mass how smooth the subjects are, dexterity is a very difficult problem so solve, not sure how simulations could handle such factors
ArashEdalat··on The dawn of the age of the exoskeleton
the difficult part for the elderly is how to put it on, the product assumes always someone helps with it, also the weight itself could be a safety hazard
ArashEdalat··on Accurate Models of AMD Matrix Cores
Worked in the GPU/TPU validation at Google, and this tracks with something we ran into constantly: pinning down raw matrix-core throughput at the instruction level is necessary but not sufficient.

The divergence between synthetic and production numbers we kept hitting wasn't from ALU throughput — it was memory bandwidth contention once multiple kernels shared HBM, and thermal throttling on sustained runs that never shows up in short burst benchmarks. A model like this would need a sustained-load / multi-tenant term to match what we actually measured in prod.

Also relevant to varispeed's RTX5080-vs-H100 collapse above — divergence that only shows up over many epochs, not the first few, usually points to accumulated numerical or thermal drift rather than a single wrong instruction.