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PixelOfDeath

264 karma · joined September 21, 2019

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PixelOfDeath··on Samsung seemingly caught swapping components in its 970 Evo Plus SSDs
> and the high capacity 3.5 inch models on the market don't use it.

Sure they do. WD sold device managed SMR 3.5 disks without telling anyone. And then people noticed because of absolutely terrible raid re-silvering performance.

The consumer market is absolute trash for SMR devices, all the disadvantages with no benefit. But you can be sure that the enterprise sector gets host managed SMR drives at a better size/price ratio.

PixelOfDeath··on Samsung seemingly caught swapping components in its 970 Evo Plus SSDs
QLC also has shitty slow write speed. (Slower then linear writes on spinning rust!)

So consumer SSDs now depend on a limited dynamic part of flash being used as SLC to cache writes. Just that this dynamic part mostly gets smaller the fuller the device is.

And as soon as you do anything with large writes you will hit a brick wall of slowness, on full devices sooner then on empty ones.

PixelOfDeath··on Samsung seemingly caught swapping components in its 970 Evo Plus SSDs
Current consumer QLC devices still do very well in read speed and especially latency. The latency often is better then on older enterprise SSDs.

Only device managed SMR is terrible. Host managed SMR is fine for data-hording if the savings in size/price are forwarded.

PixelOfDeath··on Samsung seemingly caught swapping components in its 970 Evo Plus SSDs
I would not trust a cheap chinese PCI-E to U.2 connector. And used SAS cards become kind of hot and need active cooling. So why not just directly go for a PCI-E SSD?
PixelOfDeath··on Samsung seemingly caught swapping components in its 970 Evo Plus SSDs
I got myself a used pm1725b (PCI-E v3 8x) with 3.2TB for 400€.

It hat ~350TB written, and according to Samsung is rated for 3 full device writes per day for 5 years = 17280 TB. So I have some wriggle room left.

They use lots of capacitors to hold written data in a dram and flush it out to flash on sudden power down. So they can optimize write operations for speed and low flash wear. Write speed and endurance is the part where consumer SSDs suck more and more ass.

Annoyingly many sellers do not put up the written amount of data. But I think that is more out of ignorance and less to try to dump worn down devices.

PixelOfDeath··on Samsung seemingly caught swapping components in its 970 Evo Plus SSDs
Samsung will give updates for a maximum of 5 years. So all the security holes or missing root certificates (for HTTPS connections) of the integrated browser stagnate after that.

Then you have to use a raspberry PI or some other mini computer to get the same use out of it. And then why use a "smart" TV in the first place?

PixelOfDeath··on Samsung seemingly caught swapping components in its 970 Evo Plus SSDs
With the introduction of QLC consumer SSDs, with worse write endurance and life time but the same price as TLC, I took a look at used enterprise SSDs and never looked back.

The only issues is the connectors. You need 8x PCI-E lanes (4x might work) or a SAS connector that nearly no consumer board has.

PixelOfDeath··on Intel to disable TSX by default on more CPUs with new microcode
Why not go all they way and let everything run in ring 0? Then Intel can prefetch beyond kernel entry calls again! And we also can see how AMD will performing under the same conditions!

With Intels wave of TSX disabling patches going over all the previous CPU generations, AMD apparently got it right by never bringing their own version into production at all.

PixelOfDeath··on CRISPR gene-editing breakthrough opens door to treating broad array of diseases
Looking at the world right now, I hope for the best with that gene therapy against sociopathic billionaires.
PixelOfDeath··on “Please don't waste maintainers' time on your KPI grabbing patches”
Then you get them into trying to get their own people into maintainer positions to let the golden stars flow. Maybe also be more hesitant to give out this starts to the "wrong" people from other companies. Not like there already is enough politic bullshit in open source.
PixelOfDeath··on Fun and dystopia with AI-based code generation using GPT-J-6B
Catchinator 22

Traveling back in time to kill humans, indiscriminately from their answers to random questions he asks them beforehand!

An early version of this AI can be found in the Microsoft Windows privacy settings.

PixelOfDeath··on ALiEn – a GPU-accelerated artificial life simulation program
You basically complain about Vulkan not being portable enough because Apple made their ownTM Vulken-like API instead of actually supporting Vulkan. And some other people made a subset of Vulkan working on top of that.

Why don't you complain about Apple not supporting Vulkan instead?

PixelOfDeath··on Ultra-high-density hard drives made with graphene store ten times more data
Enterprise SSDs use capacitor backed dram to buffer writes.

Some consumer SSDs do that, too. But with significant smaller amounts of dram.

This can intercept all the small writes that you e.g. do for metadata of the filesystem and via mapping can combine them into very few big writes. Or writes to the same position over and over again only need to touch the flash when the devices is powering down.

Are there any QLC enterprise SSDs? All the cheaper used enterprise SSDs I looked up where using TLC so far.

PixelOfDeath··on Ultra-high-density hard drives made with graphene store ten times more data
Many SAS expander cards can be chained to support up to 255 devices.
PixelOfDeath··on Ampere switching to in-house CPU designs
iServer with 64 cores and 128 GiB DDR4 for only $ 399,999.95

iServer with 64 cores and 256 GiB DDR4 for only $ 699,999.95

PixelOfDeath··on The Byte Order Fiasco
They hat a 50/50 chance at getting the technical electricity direction right... and the fucked it up!
PixelOfDeath··on Branch predictor: How many “if”s are too many?
Until after C++11, ternary was the only way to use "if then" in constexpr functions. So it has slightly more use from a C++ point of view.
PixelOfDeath··on The compiler will optimize that away
https://github.com/Yamahari/struct_array

It uses C++20 features and macros. The macros limit it to a POD count of 8.

PixelOfDeath··on The compiler will optimize that away
Don't forget that good cache locality also can cause data being pulled into cache that the prefetcher did know nothing about.

I can create you a shitty linked list that fits perfectly in L3, but still has terrible cold cache performance because each individual cacheline has to be pulled in one by one.

PixelOfDeath··on The compiler will optimize that away
There is some, lets call them experimental, C++ libraries for that. But C++ not having static reflection is the main show stopper on that frontier.
PixelOfDeath··on RotaJakiro: A long live secret backdoor with 0 VT detection
That is just to highlight the redundancy!
PixelOfDeath··on Btrfs on Zoned Block Devices
I wonder if a single bad bit could permanently destroy a whole ~16MiB sector? So SMR drives would need significantly more reserves to compensate for that.
PixelOfDeath··on The terrifyingly prescient ‘Serial Experiments Lain,’ 20 years later (2018)
The kind of anime that needs a compressed version, where all the relevant parts of 189* episodes are cut down without all the fillers to 10 minutes max...
PixelOfDeath··on ESP32-C6, a Wi-Fi 6 and Bluetooth 5 (LE) SoC
> Sure, if you add extra remapping hardware, nonvolatile storage, and eat the performance penalties.

Nothing a few fuses can't solve.

> Makes sense for massive quantities of crappy cheap flash, not so much for this.

Coming from the x86 world, they use plenty of fuses for everything. I can't imagine a reason why they would not absorb production variation with this for esp32 dies.

PixelOfDeath··on ESP32-C6, a Wi-Fi 6 and Bluetooth 5 (LE) SoC
Isn't memory the easiest part to remap to use build in redundancies during the factory testing of the chip?
PixelOfDeath··on Fairphone suggests Qualcomm is the biggest barrier to long-term Android support
Didn't some Linux maintainers had very clear legal words for NVidia when they tried to make a kernel HAL/ABI?
PixelOfDeath··on Crazy fast build times, or when 10 seconds starts to make you nervous (2012)
Pascal was an awesome learning language alone for its compile speed.
PixelOfDeath··on Linus Torvalds on where Rust will fit into Linux
The dark side of c is a pathway to many abilities, some considered to be unnatural
PixelOfDeath··on Seagate's Roadmap: The Path to 120 TB Hard Drives
My wild guess would be that they hold all data erasure encoded and run regular scrubs. So that any blocks with bit flips would be caught and corrected.
PixelOfDeath··on Nvidia announces mining GPUs, cuts the hash rate of RTX-3060 in half
Ask AMD why scaling up to mining demand is a bad idea.

A sudden implosion of demand combined with a flooding of the used GPU marked. Better not plan on bringing out any new GPU architectures when your warehouses are still full of the previous generation.

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