223 karma · joined August 11, 2020
[1] "Low-cost, open-source XYZ nanopositioner for high-precision analytical applications", https://doi.org/10.1016/j.ohx.2022.e00317
But maybe the easiest way to do (very low resolution) photolithography at home is to use dry film photoresist, which is like tape you can stick onto a copper PCB you then expose and etch; a cheap roll is ~$20 from eBay/Amazon.
[1] https://docs.hackerfab.org/home [2] https://dspace.mit.edu/handle/1721.1/93835 [3] https://www.inchfab.com/
If you're already using it for large file version control for, e.g., gamedev, and don't mind the cost, how well does it work to store all other company documents? I'd assume it has better scalability and permissions management than Nextcloud (not to mention the version control on par with git).
For a minimum 100 wafers = 10k chips, Groq may have paid $100M = $10k/chip purely in amortizing design costs.
Chip design (software + engineer time) and fabrication setup (lithography masks) grow exponentially [1][2] with smaller nodes, e.g., maybe $100M for Groq's current 14nm chips to ~$500M for their planned 4nm tapeout. Once you reach mass production (>>1000 wafers, which have ~150 large chips each), wafers are $10k each. On top of this, it takes ~1 year to design then have prototypes made. (These same issues still exist on older slower nodes, albeit not as bad.)
This could be reduced somewhat if chip design software were cheaper and margins were lower, but maybe 20% of this cost is due to fundamental manufacturing difficulty.
(disclosure: I don't work with recent tech nodes myself; this is my best guess)
[1] https://www.semianalysis.com/p/the-dark-side-of-the-semicond... [2] https://www.extremetech.com/computing/272096-3nm-process-nod...
They claim [1] to be able to make chips from a new design in only ~4 weeks compared to the usual 3-6 months required by anyone else, which is huge for R&D. They manage this by using an unusual relatively low-performance process (which is also what allows them to use plastic substrates), but it's arguably a worthwhile tradeoff (in return for slower larger transistors, you get significantly lower equipment cost and lead times). That the chips are flexible is almost an afterthought, I think, albeit a nifty one.
They've also announced efforts [2] toward open-sourcing their PDK, joining the growing movement toward open source chip design.
[1] https://www.pragmaticsemi.com/foundry [2] https://www.pragmaticsemi.com/newsroom/blogs/democratising-i...
Parasolid, the library used to perform the geometric operations (the most difficult and important part of a CAD program) also powers the likes of SolidWorks (the industry standard), NX, and Onshape, and is arguably the best in the world. Its licensing cost is presumably a large part of the Plasticity price.
Any given energy storage technology can store a maximum amount of energy in a fixed volume or mass. Behold one of my favorite plots: [1]
From lowest to highest energy density:
- springs, which use mechanical elastic potential energy, are kinda horrible
- capacitors, which use electric permittivity, aren't great
- next are both batteries and combusted fuels, which both use chemical reactions.
- nuclear gets us another few orders of magnitude
- finally, antimatter (E=mc^2) is a ways beyond that
Both batteries and fuels rely on the energy difference between unreacted molecules, so their theoretical energy density is the same. Well, actually, fuels are burnt to create heat which is converted to energy, and this heat->energy conversion is fundamentally thermodynamically inefficient (only ~tens of percent), whereas batteries are the same sorts of reaction but much more controlled. A sufficiently clever battery, which moves atoms around to react in the right places at the right time, is thus more efficient and thus energy-dense than fuel. However, moving atoms around like this to make a more efficient battery is much more advanced nanotech than what we currently have. But it's theoretically possible.
This is what biology does: us humans are powered by chemical storage (sugar/fat/glucose), which is used more efficiently than current batteries but without combustion. (lithium-ion is ~0.8 MJ/kg, glucose is ~16 MJ/kg, gasoline ~46 MJ/kg)
In other fields, a hobbyist can do wood/metalworking or learn programming or build a robot kit. There's an onramp for people to start learning the skills, which makes a huge ecosystem of gradually improving talent.
But in microfabrication, even though it's the only way to make chips, screens, cameras, inkjets, and LEDs, the minimum equipment cost is millions of dollars. Even worse, it takes even professionals months to fine-tune a manufacturing process to make a new thing.
As a result, R&D is much lower than it could be, and most fabrication is limited to circumstances with a high chance of mass production payoff.
- The Zero to ASIC course (and Tiny Tapeout) [1] explains transistor circuits and teaches you an open source software stack---and you get a chip physically manufactured! You could make the Nand to Tetris computer in actual silicon (if you can get enough transistors).
- To learn how things are manufactured on silicon wafers, get textbooks on microfabrication. A decent starting point is [2]. There's also a good video series [3] for a quick overview.
- To understand how a single transistor or diode works, get textbooks on "semiconductor devices". A good starting point is the free online [4].
[1] https://www.zerotoasiccourse.com/ https://tinytapeout.com/
[2] "Introduction to Microelectronic Fabrication" by Jaeger
[3] https://siliconrun.com/our-films/silicon-run-1/
[4] "Modern Semiconductor Devices for Integrated Circuits" by Chenming Hu, https://www.chu.berkeley.edu/modern-semiconductor-devices-fo...
Right now y'all look focused on digital logic somewhere between ASICs and FPGAs.
Any plans for custom chiplets? Custom analog layout might be much cheaper if done MPW or Tiny Tapeout style: design a mere ~100x100um area, then bond it to standardized chiplets for control/power.
Wikipedia estimates the Carrington was anywhere from -800 to -1750 [2].
[1] "On the probability of occurrence of extreme space weather events", Pete Riley, 2012, doi:10.1029/2011SW000734
However, reasonably sized processors need millions of transistors, and (a) we can't easily make that many at competitive feature sizes, (b) it takes significant time and effort to set up and debug a process, and even more to get high yield. So while it's theoretically possible to make small processors, it's much easier (and, including labor, probably cheaper) to leave that to dedicated fabs. Small prototyping runs (via [1] or similar) are common.
Instead, people use the lab to, e.g., prototype new MEMS devices or test new types of transistors or memory cells. Once the technology is proven, it can be mass-produced elsewhere.
The main problem is e-beam litho is extremely slow. It might take ~1 day to do a single photolithography step for a 1x1cm chip, whereas an EUV machine can pattern a 300mm diameter silicon wafer in < 1 minute. (The next problem is making everything reliable. Billions of transistors (a modern CPU) needs a failure rate per transistor of better than 1e-9.)
Maybe that's enough for extremely-low-volume production?
[1] https://mobile.twitter.com/szeloof/status/154993704406717235...
When a piece of metal is thinner than 100nm or so, its conductivity increases basically due to electrons hitting the sides. At these thicknesses, obscure metals like ruthenium, rhodium, and iridium can sometimes have higher conductivity than copper and silver. [1]
It's this one.
You're probably thinking of an electrical insulator solely as a material with low conductivity. Vacuum, air, glass (SiO2) (which is the default insulator in chip manufacturing), and many other insulators all have such negligibly small conductivity it doesn't matter here.
But all insulators have a second relevant property: their permittivity (quantified by a number called the material's "dielectric constant". When this is relevant, people often call the insulator a "dielectric"). When an insulator is between two conductors at different voltages, it forms a capacitor. In wiring this is typically undesired because the capacitor takes energy whenever the conductor voltages change.
In fact, the capacitance of the gate insulator in transistors is what causes most heat dissipation in CPUs! (Which, of course, is a big limit to scaling transistor density right now.) Unfortunately, this is fundamental to how transistors work.
Anyway, for wiring you want the capacitance formed by the insulator to be as small as possible, which you do by choosing a material with the smallest dielectric constant. The dielectric constant of SiO2 glass is about 4 times greater than both air and vacuum, which are about equally good.
But keeping a vacuum in a sealed area on a chip is occasionally used for MEMS devices like accelerometers, gyroscopes, and resonators, which would be slowed down mechanically by air pressure.
If you hold a thin beam (say, a ruler or a stiff piece of paper) horizontally in the air by one end, and press down on the free end, it bends from a straight line into a third-order (cubic) polynomial.
To calculate this, one considers the beam as a number of little segments connected to one another. The vertical force on each segment due to the force pressing down is constant over the beam. The first integral of this is the torque ("moment") on each segment. The second integral is the slope of the beam, and the third integral is the actual shape of the bent beam. If you consider it the other way around, the force is the third derivative of the resulting beam shape. This is often visualized in a "shear force and bending moment diagram".
The best part is there's a stupidly simple approximation to calculate how much bending you get from a single force (Hooke's law [2]): the distance the beam moves is proportional to the force (by some constant you can get either with these derivative calculations or by experiment).
[1] https://en.wikipedia.org/wiki/Bending [2] https://en.wikipedia.org/wiki/Hooke%27s_law
- hard drive read/write heads (the platters are debatable)
- inkjet printer nozzles (this is why making a DIY inkjet printer is nontrivial)
- air pressure sensors (e.g., for car tires)
- precise frequency filters for smartphone wireless communication
- oscillators (https://news.ycombinator.com/item?id=18340693)
- very tiny microphones for smartphones (speakers are harder)
- Digital Micromirror Devices (DMDs): arrays of tiny mirrors used in most projectors
- microfluidics ("lab-on-a-chip" stuff for fast disease testing, DNA sequencing, cell manipulation, etc)
And a couple other semiconductor applications:
- LCD/LED screens (monitors, phones, laptops, etc) (these are made on a glass surface instead of a silicon wafer but use the same basic manufacturing techniques)
- laser diodes (laser pointers, CD / Blu-ray players)
- many quantum computers
So basically, yep, this work is just about a better tiny lens; the press article is misleading (the paper [1] is better written). I don't know enough about optics to comment on how it compares to previous work, or how small a full lens + sensor system can currently be.
It's almost possible to inkjet print circuitry with transistors in research applications; see [1]. 20 micrometer resolution is relatively easy, so a WiFi/BT or NFC antenna (~millimeter scale) is very possible. I agree, the tricky bit is making (a) enough transistors to for the radio at (b) sufficiently high frequencies. As in [1], inkjet-printed transistor circuits have at most ~10 transistors as of yet (and NFC chips, with > 512 bit memory, need at least hundreds if not thousands). According to [2], inkjet printed organic transistors are in the range of MHz frequencies; NFC (~13 MHz) may be possible; WiFi (~2.2 GHz) may not be for a while yet.
[1] https://news.ycombinator.com/item?id=24129506 [2] https://doi.org/10.1021/acsnano.6b06041
[1] https://duckduckgo.com/?t=ffab&q=semiconductor+wafer+dicing&...
[1] https://hackaday.com/2014/04/29/a-diy-atomic-force-microscop...
(This surprised me too, because manufacturing on silicon wafers with non-flat surfaces is very infeasible.)
Really the only other sub-micrometer 3D printing category right now is two-photon lithography (shine a laser to cure a liquid resin into a solid, like common resin 3D printing), which can generally only use a single, even-more-specialized-than-required-for-inkjet material---almost always an insulating polymer---for an entire structure.
The paper [2] is a good review of the difficulties. Inkjet printing has at best a ≈20um minimum feature size (vs. 0.01um current transistor sizes), and the material choice is really hard: instead of silicon, you need to make semiconducting inks using funky organic molecules like 6,13‐bis(triisopropylsilylethynyl) pentacene (TIPS‐pentacene). [3] is a good recent paper trying to work around some of these limitations. So everything is still very much in the research phase.
Although inkjet printed circuits won't be anywhere near current silicon circuitry anytime soon if ever (and inkjetting transistors is the best (and kinda the only) method of 3D printing circuits we currently have), the different form factor may be useful. Circuits---even if only a few thousand transistors---could be printed on 3D geometry for interesting microfluidics capabilities, flexible circuits might make good healthcare sensors, and [4] is even studying flexible spacecraft via printed electronics for surprisingly economical space debris removal. And combining all this with 3D printed mechanical parts (via, e.g., the impressive PolyJet [5], which is basically inkjetting layers and lacks only the right materials to print electronics) will be fun.
(as to the source's Air Force Research Lab printed chips, yeah, I can't find further info, either, and agree it was probably sandpapering away most of the spare silicon bulk of an integrated circuit [impressive, useful, but not printing])
[1] https://doi.org/10.1021/acsnano.6b06041 [2] https://doi.org/10.1002/admt.201700063 [3] https://doi.org/10.1038/s41598-017-01391-2 [4] https://www.nasa.gov/feature/brane-craft/ [5] https://www.stratasys.com/polyjet-technology