1,202 karma · joined April 13, 2016
This demo:
1. Performs a Fourier transform on some image pixels, taking the pixel data from the "time" domain into the frequency domain. (Think of time as "how far through the image we are", and the pixel's intensity as the signal's magnitude; frequency in this case becomes a slightly abstract concept.)
2. Visualises that frequency domain in various ways - by default you're seeing the magnitude of the transformed signal
3. applies a band-pass filter to that frequency domain - i.e. only allowing signals above a certain frequency (low-cut) and below another certain frequency (high-cut), and removing the rest. Playing with this might give you an intuitive notion of what "frequency" means here.
4. applies the inverse transform, giving you a signal back in the time domain (i.e. a normally viewable image).
You can see what the effect of bandpassing the frequency-domain signal is on the end result. Thinking about it in terms of Information, if we band-pass half of the given frequency spectrum out, we're essentially throwing away half of the Information... but yet the image is still useful to a human (this is the principle of how lossy compression algorithms work, as others have noted).
[0] In the case of a "perfect" transform, in reality most algorithms are lossy
[0]: https://www.eejournal.com/article/ultimate-guide-to-switch-d...
Although to be fair, I also use LuaTeX quite a lot now...
https://arstechnica.com/information-technology/2020/05/gears...
This is a pretty sweeping generalisation.
That is to say, that the proportion of drivers having to make the risky decision (i.e. if they were to decide to accelerate through the amber) is significantly reduced... although interestingly I think the principle states that as T(amber) << T(green) the liklihood of indecision for that second case now does increase.
This is discussed in the paper under section 3: "Other Asses", in the paragraph starting "One way to circumvent Buridan’s Principle is to eliminate the decision".
My point is that the validator can't give you the safety property that is claimed as a defence against one of the inherent issues with this approach.
As this is provably impossible, this "solution" introduces exactly one of the problems the author was trying to avoid:
> can't be validated
I've lost entire days of my life to that book!
> the owner of the ISBN controls where the book can be printed.
I didn't realise this - that's the crucial "why" behind the "when".
If you work with proprietory hardware (think FPGAs), if you want to use the hardware, you have to use proprietory vendor tools, whether you want to or not.
> if the tools are internal then by definition you have the ability to make changes to them.
This misses the point. Having the technical ability to modify the tool does not equal having the real-world-practicability, business-case-defendable ability to change the tool.
> Well, if you make adopting good tooling in C++ harder than switching to a language that already has good tooling
The point is that in a 20 year, n-million line codebase, neither is "easy", and the pragmatic solution is to do neither.
Maybe one can't reorganise the source tree layout because to do so would break our custom tooling / integration systems / interface with proprietary vendor tools. We can't change version numbering schemes because our packages already exist 'in the wild' and can't be changed mid-sequence without causing both technical and user pain.
Fundamentally: the codebase has worked perfectly well this way for the last 20 years; what's the business case for changing it (at potentially significant cost) just to be compatible with XYZ new tool that everyone is rallying behind?
As far as I can tell, formatdoc[0] doesn't provide a "semantically correct" method for formatting quotes. Hence, the age-old usenet quote (as codified in RFC3676[1]) seems to me to be the best way of indicating a quotation, and rendering it via a verbatim block ensures that the line-based quotation indication isn't disrupted by the text all being in a <p> tag when rendered in HTML.
[0] https://news.ycombinator.com/formatdoc [1] http://www.ietf.org/rfc/rfc3676.txt
> One puzzling feature of the shift register is that there is no wiring between the stages!
> How do bits get from one stage to the next? Did the chip have another layer of wiring that wasn't in
> the photos? Was there some sort of hidden connection? Eventually I noticed that there wasn't an isolation
> ring between the stages—a silicon barrier that separated most I2L circuits. Without this isolation ring,
> an "invisible" PNP transistor exists between the stages, apparently allowing one stage to flip the next
> stage to the right value. Each shift-register stage is constructed from two NAND-gate latches. When the
> clock is low, the first latch is forced into an indeterminate state. When the clock goes high, the latch
> ends up as 0 or 1 based on the bias it receives from the previous stage through the "invisible" PNP
> transistors. Thus, the latch becomes edge-sensitive since it will change right on the clock's rising edge.
> I found a paper ("Injection-Coupled Synchronous Logic", 1978) that describes a similar technique for an I2L
> shift register9, so I think this is the right explanation, even though the circuit seems a bit sketchy.