531 karma · joined February 9, 2016
Incorrect. Our kernels (GROMACS molecular simulation package) are 2-3x slower implemented in OpenCL vs CUDA.
> On the other hand, I believe Google is working on a CUDA compiler
They were. It's upstream clang by now.
A similar mistake is about to happen, but luckily on the software side where losses can be cut quick and mistakes can be reversed easier -- though many will suffer when they have to reimplement their precious library from ground up because they did (or could) not take into account the fact that CUDA is as proprietary as it gets.
AMD has no CUDA compiler BTW. And CUDA is not a programming language FYI. ;)
Does it really have to? I'm sure you can avoid that by not using hot water (or even going with cold-ish) and not spending more than 3-5 minutes in the shower. Also you can turn off the water if washing your hear takes time. Seems simple to address.
On the shittiest day at work, or the most stressful situation at home, there's been nothing better than getting on the bike and just taking a ride wherever I have to be or going for a spin without strong purpose. It allows me to clear my mind, forget about everything else, even if just for a half an hour.
Feeling the spring breeze or even the frosty winter air's bite on my face while pedaling down the street often puts a big smile on my face even at times where otherwise I'd surely not be smiling.
I know, vague hand-waving, but hopefully others can pitch in with data.
I commute bi bicycle all year round and admittedly I'm not the chilled kind, so I tend to get soaked (from inside out) quite often, especially if the temperature is >15 C. However, I hate commuting in full bike gear, so having a shower just before leaving has helped tremendously. So does washing in the regular bathroom at work the critical spots where odor develops first (i.e. armpit). All I need is a small towel and a spare t-shit/shirt in case if the ride was too much fun and couldn't keep the speed moderate :)
"The product was an unlikely pick for top technology investors, but they were drawn to the idea of an internet-connected device that transforms single-serving packets of chopped fruits and vegetables into a refreshing and healthy beverage."
Keywords: IoT, single-serving refill packs, healthy fuit & veg.
further details reveal that the thing will track you at every single use pinging the central servers. It has a kill-switch to refuse juicing when they don't think you should be juicing anymore (for now expired package, but hey, nothing prevents updated from refining the "feature").
Need I continue?
Overall, it's a product that just rides the hype of juicing and IoT, but it's at least as nasty as the !#@%!# cloudpets [1].
[1] https://arstechnica.com/security/2017/02/creepy-iot-teddy-be...
Well, if you're still interested, KNL is a significantly better architecture, so you could just try now.
> That's the kind of deal I was looking at too. Maybe they were massively discounted because they were already EOL'd?
Refreshed my memory and I was wrong; there was some discussion to jump on the $125-$195/card deal Colfax had late 2014 [1] (likely dumping stock due to EOL), but we figured that they are not even worth that much. In comparison, the one card we have was actually bought just 10-11 months before for ~$1500.
Would you mind elaborating what kind of source code contains numerous triplets of the uppercase character "X" and why?
I have never seen such code other than produced by extremely inexperienced programmers/students with no imagination to naming symbols and ending up with "x", "xx", "xxx" variable names; even those cases will most likely not be all uppercase.
Where/when did you try buying? I didn't think it was difficult to get the 1st-gen Phi cards while they were selling them -- especially as it seemed like nobody wanted them. Admittedly I never bought any myself, my employer picked up some 31S1P from a local server OEM for testing when they were massively discounted.
Note that the Knights Landing, the current generation is released socketed only for now, so you'd need to buy a server or the ninja dev platforms Intel sells through Colfax.
Huh? Not sure what exactly do you mean by "number of processing cores"?
I use two development boxes on a regular basis with Teslas side-by-side with GeForce cards and they all work just fine.
Perhaps the reason is simply that they don't have them in their servers, but we'll see if Jeff Dean replies on G+ [1].
[1] https://plus.google.com/+JeffDean/posts/4n3rBF5utFQ?cfem=1
People have short memory (even tech journalists), especially when there is not enough competition.
Can't find a better article right now than this SEmiaccurate rant [1] which is quite inflammatory, but does not push falsehoods AFAICT. But Intel has essentially walked back from the 100-1000x improvements it initially claimed to something that's barely better than NVMe in terms of performance and robustness seems far from initial claims too.
[1] https://semiaccurate.com/2017/03/10/intel-mislead-press-xpoi...
Definitely curious to see if Intel will indeed fail as spectacularly as predicted. Given the underwhelming feeling one's left with seeing the backpedaling on the performance claims, this could be yet another example of crappy/barely usable 1st-gen products, usable 2nd gen.
I hope that this is just a rebranded system showing the redyness of System76 and raising awareness about such products so that they're better positioned for the ThunderX2 release later this year.
It's a pity that they did not include at least 32 lanes on-chip to allow two full x16 GPUs at least on the 1800X, but I hope there is a 1900X in the pipeline with more lanes.
[1] https://arstechnica.com/gadgets/2017/03/amd-ryzen-review/
That's incorrect, DGEMM and most BLAS3 is way above most if not all processor uarch's aritmetic intensity threshold [1]. Broadwell CPUs are at 10 Flops/byte [1] while e.g. DGEMM is 32 Flops/byte [2], so that's definitely FLOP/instruction bound and not memory.
> Your processor can very easily anticipate from where in that sparse-matrix your next data fetch is going to be. It's the cost of that RAM fetch[1] going along that copper trace which is going to be where you're going to bottleneck on any heavy numerical computation.
You're mixing things up, it seems! LAPACK/BLAS is dense matrix, not sparse, so now you switched topics. Sparse matrix ops are generally >1 Flops/byte (see [2]), so that's indeed memory bound.
[1] https://www.karlrupp.net/wp-content/uploads/2013/06/flop-per... [2] http://www.siam.org/pdf/news/2090.pdf
OpenCL developer tools and libraries are however a disadvantage compared to NVIDIA's CUDA stack. That's partly thanks to AMD's rather poor tools (I still hope that their OSS initiative might change that). Intel's half-assed attitude towards OpenCL support didn't help either. Most importantly, NVIDIA's attitude of intentionally crippling OpenCL on their hardware by providing piss poor dev tools, only v1.2 support, no extensions that would allow making use of their hardware's features etc. has surely contributed to successfully holding back the adoption of the OpenCL standard.
I hope the community wakes up sooner rather than later.