tcas

I still have a copy of a TI TTL Data Book, completely useless these days with the internet, LVCMOS everywhere, all in one microcontrollers and FPGAs, but it's still cool to flip through every so often.

That is a great link. Also USB Made Simple is good addition to that.

It's pretty amazing that the protocol works in the first place. It's a multi-driver, differential bus with 3 valid states (not including bus arbitration). It does all sorts of dirty things, like in order to identify a device as a USB1.0 or USB1.1 device, a resistor is either applied to D- or D+. In order to determine if the host/device should switch to USB2.0 mode, the host computer will drive both lines to low (SE0) and the device will send high current "chirps" back to the host. Essentially having multiple hosts driving the line at the same time.

http://www.usbmadesimple.co.uk/

In 1956 AT&T opened all of it's patents to everyone without royalties to settle an antitrust suit, including the transistor.

http://explodingthephone.com/docs/dbx1036.pdf

NYC does this right now on high traffic routes with their select bus system. You pay at the stop which then prints out a receipt that is valid on that route for 1 hour. Every so often inspectors board the bus and look at the tickets.

The 8b10b encoding mostly helps with clock recovery and preventing a DC bias (+/- charge) build up in the cable, which helps with error detection (I think it can detect only single bit) and recovery from, but can't correct.

At Netflix's scale I'm almost certain that paying for the space and power would still be much cheaper than having to pay direct bandwidth costs / external CDN costs.

I wonder how they decide who gets to put a server in there for free, I always thought it was just a matter of money.

It's explained pretty well in the article. Basically with CTR using the block # as the nonce you break the security assumptions of a nonce (use only once). If the cryptofunc is static, and you are editing a document in place, an attacker can see exactly which bytes changed and do other statistical attacks.

Think about a file that you preallocate with NULLs. If you get an image of the disk before you write to the file and then an image once you write to the file, you can simply XOR the before and after to get the ciphertext.

e.g.

  using block 100
  cipherblock_before = cryptofunc(100) ^ 0x00 = cryptofunc(100)
  cipherblock_after = cryptofunc(100) ^ data
  cipherblock_after ^ cipherblock_before = data

Another good source is: http://www.damninteresting.com/a-potentially-disastrous-desi...

Apparently it costed $8 million to repair.

I've clocked Acela at just below 150mph on my GPS in between Providence and Boston. As I understand it, they would like to go faster in other sections, but the track / catenary isn't able to sustain that speed on most of the journey. Still way better than flying for BOS<->NYC or NYC<->WAS. It's a shame that the ticket prices are 2x what the regional is though.

Never heard about having dedicated rails. It would be nice, since the FRC requires any train that travels on track shared by freight to be basically built like a tank, which makes them much more expensive to make an operate.

Are you guys planning on doing custom cables as well (at least on the other sites)? I imagine the molding tooling makes this a no-go for anything but larger orders.

There are, but they aren't close in specs and price to this one. The AT91 series are completely different in terms of functionality vs the Broadcom. The AT91SAM9 series don't even have a floating point unit last time I checked. This chip can do full 1080p h264 encoding/decoding/and support that resolution for display output (HDMI and DSI). This also has flash storage and 2x more ram onboard.

This might be a close equivalent, but is more expensive, and will almost certainly require a large order to get those prices: http://www.variscite.com/products/system-on-module-som/corte...

If this brings down prices of the commercial SoM vendors that benefits all of us however.

This is very interesting in regards to a having cheap Linux SoM (system on module) for businesses to use in their products as well, by far the cheapest I know of with these specs. Doing routing and verification for a chip like that is no easy task.

I'm really curious to see if the foundation will commit to a product lifespan / availability for commercial use. If so this could become pretty big. Obviously if you are selling a product in 100,000s+ you will probably roll your own, but for a small business to produce a niche product that's going to be sold in the high hundreds, or product a proof of concept this is awesome.

EDIT: rereading the blog post, this is aimed at commercial use, definitely great in regards to pricing, however, I wouldn't want to base a product on it without a guarantee of availability / compatibility from them. The Beaglebone black specifically says that they don't guarantee compatibility between revisions for this reason.

Additionally, device tree support in the Linux kernel allows many board specific ports to be packaged onto a single kernel, and the bootloader specify which peripherals and their addresses and features are there. Still nowhere near as powerful as ACPI though.

I believe that. Even for 0.5mm QFPs, trying to do a stencil at home controlling the amount of solder paste is very difficult. Almost every attempt I've tried leads to at least a few bridges (easy to fix, but still annoying). With the professional machines you guys have it's probably much more reliable even with not so great stencils.

Do you end up doing a final DFM as well for most submitted stencil files?

Depends on a lot of factors: how big (reputable) the company doing the testing is, how big your device is, what voltages your devices runs on, what frequencies are on the board, number of I/O, number of configurations to test (to explain the last part, say your device can either run off USB or ethernet, you'll probably need to test both).

For something simple (clocks less than 200mhz), usually half a day of testing will cost between 1k and 2k I think. However, take these numbers with a grain of salt.

EDIT: they can also help you track down leaks and pass through testing the first time as well (i.e. say you're leaking tons of RF through a badly shielded ethernet port. They can track it down, and will have copper tape so you can test to see if a simple patch will fix it, which if the testing is much more expensive might be an acceptable step to add to your assembly procedure vs. doing a respin of the board).

BTLE and WiFi are getting a bit easier thankfully. I know the TI CC3000 doesn't require intentional emitter testing if the recommended design is followed which saves a _lot_ of money and time. [0]

Agreed that FCC unintentional emitter testing can be a pain, however, unless you're doing something very fancy it's not that hard to achieve, and it's not super expensive if you just need a low frequency unintentional testing.

I'm not a lawyer, but I think you can self declare as well for unintentional emitters, just if you get caught the penalties are much stricter than if you can prove you went through a lab.

[0] http://processors.wiki.ti.com/index.php/CC3000_Product_Certi...

QFNs and most reflows are tricky as well, since it requires you to also design the board properly to reflow correctly. For example, if the QFN has a large ground pad in the middle, putting unmasked vias in the middle can cause solder to get sucked down to the other side. To the best of my knowledge, there isn't a great handbook that explains all this, since it crosses a bunch of fields (the electrical design says you will want a few vias in the pad to lower impedance, while the manufacturing might say otherwise [0] or will be able to do it no problem).

In regards to memory and more advanced stuff, the beaglebone/raspberry pi/other system on modules are great for the hobbyist and low volume production, since making what is essentially a computer can be very difficult. It might work on the first spin, but hard to spot issues might occur if the power / grounding isn't good enough, or if there are noise or other signal integrity issues.

[0] http://i.screamingcircuits.com/docs/Via_In_Pad_Guidelines.pd...

Profitability seems very very very far away

Just to add, right on their S1 risk factors:

  We have incurred significant losses in each period since our inception in 2005.
  We incurred net losses of $50.3 million in our fiscal year ended December 31, 2011,
  $112.6 million in our fiscal year ended January 31, 2013, and
  $168.6 million in our fiscal year ended January 31, 2014. 
  As of January 31, 2014, we had an accumulated deficit of $361.2 million

Granted the risk section is usually the absolutely worst case scenario, but it's interesting that they're losing more money at a faster pace each year.

In addition, part of a private pilot license training is stall recovery, and engine loss scenarios.

I remember sitting in on a lesson while my brother was getting his private pilot's license. The instructor would randomly idle the engine in flight and have my brother practice the procedures for a engine loss in flight (put the plane into the ideal glide position, identify all possible landing spots, runway or field, etc...)

One more that I like is: http://www.mothersruin.com/software/SuspiciousPackage/

Shows the contents of any pkg file including scripts

The air pollution levels are similar to living an airport smoking lounge.

http://www.bloomberg.com/news/2013-01-30/beijing-air-akin-to...

Inertial navigation systems[1] have been used for more years than GPS has existed. Even now almost all military drones / rockets / ICBMs use very precise inertial systems.

[1] http://en.wikipedia.org/wiki/Inertial_navigation_system

Pretty cool, but I think the PCB design will need a bit more work before it can be assembly house produced. There seems to be a lot of pointless via in pads that are not plated over (plated over costs $). From most assembly houses I've dealt with this is a big no-no (usually they'll still try, but expect tombstoning and other bad things as solder is sucked through the via). Same thing with the QFN/P parts.

If I had a copy of OrCad I'd love to check out the actual schematic/layout, the Upverter doesn't seem to be updated.

Haven't used sidestep, but sshuttle [1] is a nice command line utility that does the same, just not automatically.

Much easier than setting up a VPN server.

[1] https://github.com/apenwarr/sshuttle

That's true of stream ciphers, and if they reuse a nonce.

It looks like they used 3DES which is for all intents and purposes here, immune to a this kind of attack.

EDIT: If they use 3DES in a CTR mode then it could be vulnerable to this, but looking at the base64ed texts in the blog posts, they are multiples of 8 meaning it is almost certainly in a block cipher mode. Would be interesting to see if you can find any block similarities if they used ECB.

I just tried this -- you don't know _which_ combination is missing unfortunately in the case of a 2 or 3 digit number. With 3 you might be able to figure it out by using the limit of 250 (e.g. if 2 4 and 7 are missing there is only 1 to recombine them and have it be less than 250), but with two how do you differentiate between say 26 and 62 in a clever, non brute force way?

In case anyone wants a starting point:

  import random
  from collections import Counter
  
  rand_list = range(0, 250)
  random.shuffle(rand_list)
  
  missing = rand_list.pop()
  
  shuffled = ''.join([str(x) for x in rand_list])
  
  full_list = ''.join([str(x) for x in xrange(0, 250)])
  cntr = Counter()
  for digit in full_list:
      cntr[int(digit)] += 1

  for digit in shuffled:
      cntr[int(digit)] -= 1
  
  digits = []
  for k, v in cntr.items():
       for _ in range(0, v):
           digits.append(k)

True, but if I recall correctly spatial multiplexing can be used to increase channel capacity.

Using the same 50db SNR for WiFi at 40Mhz we get:

  ((40000000)*(log(1+100000)/log(2)))
  ans =  6.6439e+08

or 664Mbit/s, however, 802.11ac can achieve higher than that by using MIMO. I unfortunately don't know the formula for max channel capacity for multiple streams.

It doesn't seem like they are using this though in their experiment.

If you're curious how subways signaling/safety mechanisms operate, the nycsubway site[1] has a pretty good rundown on NYC's procedures, and its original language is English as well. It basically is a large ad-hoc system (+ some remote control) with lots failsafes.

[1] http://www.nycsubway.org/wiki/Subway_Signals:_A_Complete_Gui...

So, essentially feeding it into something like BUF? I thought those were optimized out on modern FPGAs.

I can see the sourcing issue when trying to fan out too much from a single module, but I don't see any issue doing a high speed interconnect between them as long as you're intelligent about where the modules are going to be placed in regards to chip I/O. i.e. don't have a high speed serdes unit on one bank try and directly talk to a bank on the other side of a chip.

"In high speed designs, it’s an error to use a signal that’s sourced from another module"

How else are you supposed to get I/O from one module to another, say a 32bit data bus? Also, what's the definition of high speed here?

"unless you like random errors"

And very hard to diagnose errors until you realize that you messed up your clock domains.