238 karma · joined April 20, 2022
[ my public key: https://keybase.io/pietrushnic; my proof: https://keybase.io/pietrushnic/sigs/53yNGzLtl8T5PpaTKXeVHgAAtRmMpsQhuRYEsODCfTY ]
We also have to note that AMD seems to be heading for being a market leader in the server market (some signals are active in OCP Caliptra and OSF). We can see their presence at the upcoming OCP Summit, where they (together with Intel) will push forward the agenda of a generic framework for bootstrapping firmware, which is called openSFI: https://youtu.be/1CE6olXT604
Unlike traditional firmware interfaces, which expose UEFI Secure Boot as a collection of loosely connected toggleable settings and unmanaged certificate stores, this application presents a coherent, wizard-like experience. Its purpose is to make the process of reviewing and enrolling platform keys intuitive for users who are not security experts.
1. Presentation about Dasharo Revenue Sharing and Dasharo Supporting
https://www.youtube.com/live/ZyctrnJNTPc?si=svfFEO6WXiF3BNqz...
2. Publicly available overview of cooperation models:
https://youtu.be/n2NlymUVYCY?feature=shared&t=115 https://www.youtube.com/live/EN5rBAAOdOk?si=YKrkR28rQE1TyoWe...
https://github.com/Dasharo/presentations/blob/main/archive/d...
Please let me know if anything is missing or if anything is unclear.
I'm interested in your experience, which AMR SoC has the most Secure boot-friendly ecosystem?
The RISC-V ecosystem is also interesting. Recently, I was looking at Kendryte K230D.
At this point, we are instead trying to fill the vacuum by providing something, maybe not the most enjoyable, but a basic introduction to the topic to buy some time for domain experts instead of answering basic questions.
This course aims to make the foundational aspects of coreboot more accessible to anyone interested in learning about open-source firmware development. In future classes, we'll dive deep into the nuts and bolts of coreboot, from its architecture to hands-on implementation on hardware. I'd love to invite everyone reading this to check out the course, and whether you're an experienced firmware developer, an open-source enthusiast, or a newcomer curious about coreboot, your perspectives, and questions are all welcome.
Please feel free to ask me anything - about the course, coreboot, my experience in this field, or anything else you'd like to know. I am looking forward to a vibrant discussion!
The openness of specification only matters a little here - UEFI specification about management mode is also open. But IBVs screwed us many times [3] by implementing low-quality SMIs that could elevate privileges, and the spec does not guarantee that implementers follow it. Lack of tooling makes compliance difficult - it slowly changes with various startups seeing that as an opportunity (e.g., Binarly, Eclypsium?).
My point is that SMM as TEE is not a unique x86 feature, and other significant architectures have similar mechanisms. OS has a means of figuring out that it was in SMI, so it is not entirely hidden but still has superpowers. In the CNC world SMI latency is measured from OS [4].
Trusted execution environments are hammers and can be used for a good purpose in a transparent way and for malicious purposes. Further typically depends on the trustworthiness of mechanisms implemented and used by vendors, but thus keep the fact that TEEs and peripheral MCUs are everywhere, which may lead to the extended attack surface.
Why do we see those TEEs, peripheral MCUs, everywhere? I like the explanation in this lecture [5]. No architecture can quickly fix that problem.
[1]: https://hex-five.com/multizone-security-tee-riscv/
[2]: http://docs.keystone-enclave.org/en/latest/Getting-Started/H...
[3]: https://research.nccgroup.com/2023/04/11/stepping-insyde-sys...
[4]: http://wiki.linuxcnc.org/cgi-bin/wiki.pl?FixingSMIIssues
I see that support for FreeBSD going in good direction:
https://forum.traverse.com.au/t/freebsd-preview-for-ten64/17...
Are there any performance reports for FreeBSD? Especially VPN/wireguard bandwidth would be interesting.
My comments is about designs that potentially could meet the requirements, but surprisingly those have different problems. How we know those designs? We consult for firewall vendors doing research. We would be glad to be wrong by being pointed to viable competing solution which can reach score close to PC Engines. Performance is not the only factor for small ISP and security-concious privacy-concerned infrastructure builders.
So it is not that trivial to purposefully build firewall these days that can compete with PC Engines low power consumer/SOHO design.
Hyperscalers (OCP) pushing for coreboot and LinuxBoot have probably different experience. AFAIK they hate SMM especially with SMI handlers coming form unknown source.
Not saying SMI latency is huge problem in industrial applications like CNC.
Let's be honest every architecture has the same problem of parallel "trusted" execution environment, some have even more than one.
- ARM TrustZone
- POWER SBE
- RISC-V SBI
[1]: https://voidst.one/posts/comprehensive-guide-to-pc-engines-a...
- no ECC
- no DRTM
- no schematics
- no open-source firmware support
Trustworthiness of those devices is at least questionable.
Today AMD announced [1] Ryzen 5000 with network appliance as target market. I can only imagine how expensive it would be in final design.
[1]: https://www.amd.com/en/newsroom/press-releases/2023-4-20-amd...
What we were able to realize over the years of writing firmware and researching new solutions for network appliance vendors is that support for accelerators is considered a premium feature and typically is available only behind paywall corporate unobtanium. Consider very respected silicon vendors, such as Marvell [1] or NXP [2].
If you have in mind hardware (no matter if x86, Arm, RISC-V, or POWER) that would be able to mark all checkboxes that PC Engines score [3] with 10G performance, then it would be exciting competition otherwise, we are very far from community expectations, where most BSD users with open-source firmware based hardware choose PC Engines or Protectli [4].
[1]: https://www.spinics.net/lists/linux-crypto/msg53306.html
[2]: https://www.nxp.com/support/support/nxp-engineering-services...
[3]: https://news.ycombinator.com/item?id=35636960
[4]: https://bsd-hardware.info/?view=computers&f=node_coreboot&v=...
The pros of Hardkernel are open schematics (same as PC Engines), which is crucial if one would like to have open-source firmware like coreboot. Quite good testing documentation, transparency, and community. UP2 does not provide schematics, and their support could be better, which can be proven by reading their forums. There needs to be a sense of transparency and community building for UP2.
Of course, UP2 and Hardkernel products have other drawbacks compared to PC Engines, namely, no D-RTM, fewer NICs, higher TDP, no ECC, etc.